JK-trigger. Principle of operation, functional schemes, truth tables

The trigger is an elementary digital automatic machine. It has two states of stability. One of them is assigned the value "1", and the other - "0".

The following types of devices are distinguished according to the method of implementing logical connections: JK flip-flop, RS flip-flop, T flip-flop, D flip-flop , etc.

The subject of our discussion today are automatic machines of the type JK. They differ from RS-devices in that when input to the information prohibited for RS-flip-flops, invert the information stored in them.

We present to your attention the transition table, which describes the operation of the JK-trigger. When minimizing the Carnot Cata, the characteristic equation for the considered device is derived: Q (t + 1) = K't Qt V Jt Q't.

The table shows that the state of the device is determined not only by the information values at the inputs J and K, but also by the state at the output Qt, which previously determined the JK-trigger. This allows you to build functional diagrams of such devices on two-stage automata such as RS. JK-devices are synchronous and asynchronous.

To design a JK flip-flop from a two-step RS synchronous type device, it is required to connect the feedback links of the outputs of a two-stage RS to the inputs of the logic elements of its first stage.

Principle of operation of the JK-trigger: if the level of zero is applied to the information inputs (J and K) of the device, the level of unity is set at the output of the NAND elements (1 and 2), and the JK-trigger will keep its state. For example, Q will be equal to logical zero, Q 'to logical one. In this case, when J and C signals equal to the logical one are input, a logic zero is set at the input of the AND-HE1 element and, accordingly, the logical unit level at the input of the first T-flip-flop. When the synchronizing signal (C is zero) is removed, the state of the T-type device of the logical zero level from the output AND = HE3 is transmitted to the input of the second T-flip-flop. As a result, the JK flip-flop switches to the logical unit state (in this case, Q is equal to one, and Q 'is zero). Now, if a signal equal to the logical one is fed to the trigger input (K and C), then at the output of the AND-HE2 element the logical zero will set the first T flip-flop to the zero state. After removing the synchronizing signal from the output of the AND-HE4 element, the logical zero is transmitted to the input of the second T type machine, and the JK trigger is switched to the logical zero state.

When designing complex logic circuits, devices of different types are needed. Therefore, it is more profitable to produce a universal type of device, which can be used in various modes of operation and modifications. In integrated circuit technology, synchronous D- and JK-triggers are most widely used. In electronic computers, digital JK type machines with group J, K and additional mounting R, S-inputs are widely used. Each group is combined by conjunctions, which allows to expand the logical capabilities and JK-trigger.

Automatic devices of this type are convenient to use when designing counters (a computer node that calculates and stores the code of the number of counted signals). For example, the photo shows a counter on JK-triggers. Structural organization of binary counters with parallel transfer is greatly simplified if they are built on devices of the JK type with built-in logic elements.

Also, such triggers have found application in the construction of shift registers.

Shift registers are nodes that move the binary information to the right and left in the register, depending on the control signals.